"architecture" tag
Let's optimise a bit...

CodeSport (October 2011)

In this month’s column, let us focus our attention on some of the common compiler optimisations, and on how to write code that can be well optimised by the compiler. In last month’s…

Dissecting Instruction Level Parallelism

Dissecting Instruction Level Parallelism

Instruction Level Parallelism (ILP) technology is often used to improve the performance of embedded processors in application-specific domains like Digital Signal Processing. Today’s VLIW (Very Large Instruction Word) DSP architectures are specially designed…

Binutils Porting Guide To A New Target Architecture

The article intends to help software engineers who want to port the binutils tools to a new hardware architecture for the first time.

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