Designed for IoT, wearables, and sensor-rich systems, it delivers high-performance machine learning at the edge—without compromising battery life.
A new RISC-V–based microcontroller platform is making waves in the open hardware community, combining dual-core processing, integrated AI acceleration, and ultra-low power operation for the next generation of intelligent edge devices. Unveiled ahead of the RISC-V Summit 2025, the new MCU family showcases how open-standard architectures are reshaping what’s possible in energy-efficient computing.
Built around two SiFive Essential IP cores and paired with Upbeat-designed AI accelerators, the MCU delivers up to 400 MHz of performance and 717 DMIPS while maintaining an exceptionally low energy profile of 16.8 µW/MHz/DMIPS. This balance allows it to execute edge AI inference, sensor fusion, and DSP workloads that traditionally required more power-hungry processors.
The device leverages near-threshold operation, on-chip Error Detection and Correction (EDAC), and optimized SRAM architecture to enhance both energy efficiency and reliability. These features make it particularly suited for always-on IoT applications, smart wearables, UAVs, and predictive maintenance systems where power constraints are critical.
Early developer feedback highlights how the integrated AI and DSP engines enable richer on-device models and longer battery life without compromising performance. The platform’s open RISC-V foundation also means designers can customize, extend, and optimize their implementations without proprietary lock-ins—aligning well with the ethos of open hardware innovation.
Demonstrations at the RISC-V Summit will highlight the MCU in real-world use cases, alongside complementary low-power sensing technologies such as bone conduction microphones optimized for edge audio applications. Engineering samples, SDKs, datasheets, and reference designs are now available for developers looking to explore energy-efficient AI at the microcontroller level.
With its blend of open architecture, AI capability, and ultra-low power design, this MCU represents a pivotal step toward democratizing high-performance edge intelligence across open-source electronics ecosystems.
