An upcoming Linux kernel patch enables the SFENCE instruction in write memory barriers on older processors with SSE but without SSE2, potentially improving performance on affected systems.
A minor optimisation is being added to the Linux kernel for older processors that support Streaming SIMD Extensions (SSE) but lack SSE2. The affected systems include AMD Athlon XP processors, some early Sempron models, and certain Intel Celeron and Pentium III processors.
The patch is related to the write memory barrier (WMB) which currently utilizes SFENCE instruction. The patch addresses a constraint in the current kernel code that restricts the use of SFENCE to processors with SSE2 capability, although SFENCE was introduced with the original SSE instruction set.
Open-source developer Yao Zi identified the issue. The correction changes the processor feature requirement used by the wmb() function from SSE2 to SSE, allowing SFENCE to be used on processors without SSE2 support. This ensures that the appropriate memory barrier operation can be used on these processors.
The patch has been picked up into the tip/tip.git x86/core branch and is expected to be merged during the Linux 7.3 development cycle. It has also been earmarked for back-porting into older stable Linux kernel lines. No performance measurements have been carried out on the affected processors, so the potential performance improvement remains unmeasured.
